undar-lang/docs/VM.org

• Reality Engine VM
• Core x86 ISA -> RISC-like
  • Math
  • MEM
  • Branch
• Stack based system in machine code

Ok this actually sounds similar to my soluition. I have a variation on the smalltalk model,

Reality Engine VM

I imagine that this is running on a turing machine with 2 stacks (one operation, one stack); harvard arch.

when a function gets called the function allocates N many "locals" onto the tape, primitves are just the raw values, complex values in locals are stored as ptrs to the positions in memory following the locals array.

Instead of just arrays, each array is wrapped in a linked list, so its a ptr to the next link followed by the size followed by an array of raw data. When modified it just adds the new values to the end of the list. The list then can be "collapsed" back into a simple array.

Core x86 ISA -> RISC-like

Math

RISC : ADD SUB AND OR XOR SHL SHR x86 : ADD SUB AND OR XOR SHL SHR

• flags don't matter unless there is a conditional branch immediately after without a CMP/TEST in-between

MEM

RISC : LOAD [Base + Offset] x86 : MOV Reg, [Base + Offset] RISC : STORE [Base + Offset] x86 : MOV [Base + Offset], Reg

Branch

RISC : Branch Eq x86 : CMP JE

Stack based system in machine code

x86 ARM32 RISC-V TOS (Top of Stack) = EAX W0 R0 TOS - 1 = ECX W1 T1 TOS - 2 = EDX W2 T2 Memory Stack = Hardware Ptr (ESP, SP, SP)