330 lines
9.1 KiB
Tal
330 lines
9.1 KiB
Tal
|100
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LIT2r 0000
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!{ @code $2 } ;{ #0002 ADD2 } !{ 2b 2b 2b 2b 2b 2b 2b 2b 5b 3e 2b 2b 2b 2b 5b 3e 2b 2b 3e 2b 2b 2b 3e 2b 2b 2b 3e 2b 3c 3c 3c 3c 2d 5d 3e 2b 3e 2b 3e 2d 3e 3e 2b 5b 3c 5d 3c 2d 5d 3e 3e 2e 3e 2d 2d 2d 2e 2b 2b 2b 2b 2b 2b 2b 2e 2e 2b 2b 2b 2e 3e 3e 2e 3c 2d 2e 3c 2e 2b 2b 2b 2e 2d 2d 2d 2d 2d 2d 2e 2d 2d 2d 2d 2d 2d 2d 2d 2e 3e 3e 2b 2e 3e 2b 2b 2e 00 } ;code STA2
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;code LDA2 bf_ POP2r BRK @bf_ ( code -- )
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OVR2r LIT2r 000a SUB2r
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STH2kr STA2
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STH2kr #2712 ADD2 LDA2
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STH2kr #2714 ADD2 LDA2
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#0000 STH2kr #2714 ADD2 STA2
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&while.0 STH2kr #2714 ADD2 LDA2 #006a LTH2 #03 JCN !{
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STH2kr #0004 ADD2 LDA2 #0000 LTH2 #03 JCN !{
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!&if_end.0 } &if_end.0
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STH2kr #0004 ADD2 LDA2 #006a GTH2 !&return STH2kr #0002 ADD2 LDA2 ;memory LDA2 GTH2 #03 JCN !{
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!&return !&if_end.1 } &if_end.1
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STH2kr LDA2 #03 JCN !{
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!&if_end.2 } &if_end.2
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STH2kr #0004 ADD2 LDA2 #0027 STH2kr #0002 ADD2 LDA2 #0001 ADD2 STH2kr #0002 ADD2 STA2 STH2kr LDA2 #03 JCN !{
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!&if_end.3 } &if_end.3
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STH2kr #0004 ADD2 LDA2 #0027 STH2kr #0002 ADD2 LDA2 #0001 SUB2 STH2kr #0002 ADD2 STA2 STH2kr LDA2 #03 JCN !{
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!&if_end.4 } &if_end.4
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STH2kr #0004 ADD2 LDA2 #0027 ;memory STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 ;memory STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #0001 ADD2 STH2kr LDA2 #03 JCN !{
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!&if_end.5 } &if_end.5
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STH2kr #0004 ADD2 LDA2 #0027 ;memory STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 ;memory STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #0001 SUB2 STH2kr LDA2 #03 JCN !{
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!&if_end.6 } &if_end.6
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STH2kr #0004 ADD2 LDA2 #0027 ;memory STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #18 DEO STH2kr LDA2 #03 JCN !{
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!&if_end.7 } &if_end.7
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STH2kr #0004 ADD2 LDA2 #0027 ;memory STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #12 DEI STH2kr LDA2 #03 JCN !{
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!&if_end.8 } &if_end.8
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STH2kr #0004 ADD2 LDA2 #0027 ;memory STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #0000 EQU2 #03 JCN !{
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STH2kr LDA2
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#0001 STH2kr STA2
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&while.1 STH2kr LDA2 #0000 GTH2 #03 JCN !{
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STH2kr #0004 ADD2 LDA2 #0001 ADD2 STH2kr #0004 ADD2 STA2 STH2kr LDA2 #03 JCN !{
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!&if_end.9 } &if_end.9
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STH2kr #0004 ADD2 LDA2 #0027 STH2kr LDA2 #0001 ADD2 STH2kr STA2 STH2kr LDA2 #03 JCN !{
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!&if_end.10 } &if_end.10
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STH2kr #0004 ADD2 LDA2 #0027 STH2kr LDA2 #0001 SUB2 STH2kr STA2 !&while.1 }
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!&if_end.11 } &if_end.11
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STH2kr LDA2 #03 JCN !{
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!&if_end.12 } &if_end.12
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STH2kr #0004 ADD2 LDA2 #0027 ;memory STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #03 JCN !{
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STH2kr LDA2
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#0001 STH2kr STA2
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&while.2 STH2kr LDA2 #0000 GTH2 #03 JCN !{
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STH2kr #0004 ADD2 LDA2 #0001 SUB2 STH2kr #0004 ADD2 STA2 STH2kr LDA2 #03 JCN !{
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!&if_end.13 } &if_end.13
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STH2kr #0004 ADD2 LDA2 #0027 STH2kr LDA2 #0001 ADD2 STH2kr STA2 STH2kr LDA2 #03 JCN !{
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!&if_end.14 } &if_end.14
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STH2kr #0004 ADD2 LDA2 #0027 STH2kr LDA2 #0001 SUB2 STH2kr STA2 !&while.2 }
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!&if_end.15 } &if_end.15
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STH2kr #0004 ADD2 LDA2 #0001 ADD2 STH2kr #0004 ADD2 STA2 !&while.0 }
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&return
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POP2r JMP2r
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@sext
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#80 ANDk EQU #ff MUL SWP JMP2r
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@sdiv
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OVR #80 AND ?&b_neg &b_pos OVR2 POP #80 AND ?&a_neg_b_pos DIV2 JMP2r &a_neg_b_pos SWP2 #0000 SWP2 SUB2 SWP2 DIV2 #0000 SWP2 SUB2 JMP2r
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&b_neg #0000 SWP2 SUB2 OVR2 POP #80 AND ?&a_neg_b_neg DIV2 #0000 SWP2 SUB2 JMP2r
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&a_neg_b_neg #0000 ROT2 SUB2 SWP2 DIV2 JMP2r
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@aalloc_ ( size* -- result* )
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OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
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;mem_length_ LDA2 STH2kr STA2
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;mem_length_ LDA2k STH2kr INC2 INC2 LDA2 ADD2 SWP2 STA2
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;mem_ STH2kr LDA2 ADD2 !&return
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#0000
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&return
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POP2r JMP2r
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@areturn_ ( size* src* checkpoint* -- result* )
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OVR2r LIT2r 000a SUB2r STH2kr #0008 ADD2 STA2
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STH2kr #0006 ADD2 STA2
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STH2kr #0004 ADD2 STA2
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;mem_ STH2kr #0008 ADD2 LDA2 ADD2 STH2kr INC2 INC2 STA2
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STH2kr #0006 ADD2 LDA2 STH2kr INC2 INC2 LDA2 NEQ2 ?&end.1
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STH2kr #0006 ADD2 LDA2 !&return
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&end.1
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#0000 STH2kr STA2
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&begin.2
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STH2kr LDA2 STH2kr #0004 ADD2 LDA2 LTH2 #00 EQU ?&break.2
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STH2kr #0006 ADD2 LDA2 STH2kr LDA2 ADD2 LDA sext
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STH2kr INC2 INC2 LDA2 STH2kr LDA2 ADD2 STA
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POP
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&continue.2
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STH2kr LDA2k INC2k ROT2 STA2
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POP2 !&begin.2
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&break.2
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STH2kr #0008 ADD2 LDA2 STH2kr #0004 ADD2 LDA2 ADD2 ;mem_length_ STA2
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#0000 ;mem_ ;mem_length_ LDA2 ADD2 STA
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POP STH2kr INC2 INC2 LDA2 !&return
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#0000
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&return
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POP2r JMP2r
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@afree_ ( -- result* )
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OVR2r #0000 ;mem_length_ STA2
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#0000
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&return
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POP2r JMP2r
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@amcpy_ ( length* from* -- result* )
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OVR2r LIT2r 0008 SUB2r STH2kr #0006 ADD2 STA2
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STH2kr #0004 ADD2 STA2
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STH2kr #0004 ADD2 LDA2 aalloc_
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STH2kr INC2 INC2 STA2
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#0000 STH2kr STA2
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&begin.1
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STH2kr LDA2 STH2kr #0004 ADD2 LDA2 LTH2 #00 EQU ?&break.1
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STH2kr #0006 ADD2 LDA2 STH2kr LDA2 ADD2 LDA sext
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STH2kr INC2 INC2 LDA2 STH2kr LDA2 ADD2 STA
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POP
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&continue.1
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STH2kr LDA2k INC2k ROT2 STA2
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POP2 !&begin.1
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&break.1
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STH2kr INC2 INC2 LDA2 !&return
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#0000
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&return
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POP2r JMP2r
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@nat_to_str_ ( n* -- result* )
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OVR2r LIT2r 000a SUB2r STH2kr #0008 ADD2 STA2
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#0005 STH2kr STA2
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&begin.1
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STH2kr #0008 ADD2 LDA2 #000a OVR2 OVR2 DIV2 MUL2 SUB2 #0030 ADD2 STH2kr INC2 INC2 STH2kr LDA2k #0001 SUB2 SWP2 STA2k
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POP2 ADD2 STA
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POP STH2kr #0008 ADD2 LDA2k #000a DIV2 SWP2 STA2
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&continue.1
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#0000 STH2kr #0008 ADD2 LDA2 LTH2 ?&begin.1
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&break.1
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#0005 STH2kr LDA2 SUB2 STH2kr INC2 INC2 STH2kr LDA2 ADD2 amcpy_
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!&return
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#0000
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&return
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POP2r JMP2r
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@int_to_str_ ( n* -- result* )
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OVR2r LIT2r 000c SUB2r STH2kr #000a ADD2 STA2
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#0006 STH2kr INC2 INC2 STA2
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STH2kr #000a ADD2 LDA2 #8000 EOR2 #8000 LTH2 #00 SWP #0000 NEQ2 #00 SWP STH2kr STA
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POP LDAkr STHr sext
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#0000 EQU2 ?&end.1
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#0000 STH2kr #000a ADD2 LDA2 SUB2 STH2kr #000a ADD2 STA2
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&end.1
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&begin.2
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STH2kr #000a ADD2 LDA2 #000a OVR2 OVR2 sdiv/b_pos
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MUL2 SUB2 #0030 ADD2 STH2kr #0004 ADD2 STH2kr INC2 INC2 LDA2k #0001 SUB2 SWP2 STA2k
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POP2 ADD2 STA
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POP STH2kr #000a ADD2 LDA2k #000a sdiv/b_pos
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SWP2 STA2
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&continue.2
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#8000 STH2kr #000a ADD2 LDA2 #8000 EOR2 LTH2 ?&begin.2
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&break.2
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LDAkr STHr sext
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#0000 EQU2 ?&end.3
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#002d STH2kr #0004 ADD2 STH2kr INC2 INC2 LDA2k #0001 SUB2 SWP2 STA2k
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POP2 ADD2 STA
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POP
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&end.3
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#0006 STH2kr INC2 INC2 LDA2 SUB2 STH2kr #0004 ADD2 STH2kr INC2 INC2 LDA2 ADD2 amcpy_
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!&return
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#0000
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&return
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POP2r JMP2r
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@int_to_nat_ ( n* -- result* )
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OVR2r LIT2r 0002 SUB2r STH2kr STA2
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STH2kr LDA2 !&return
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#0000
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&return
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POP2r JMP2r
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@nat_to_int_ ( n* -- result* )
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OVR2r LIT2r 0002 SUB2r STH2kr STA2
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STH2kr LDA2 !&return
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#0000
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&return
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POP2r JMP2r
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@int_add_ ( b* a* -- result* )
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OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
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STH2kr STA2
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STH2kr INC2 INC2 LDA2 STH2kr LDA2 ADD2 !&return
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#0000
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&return
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POP2r JMP2r
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@int_sub_ ( b* a* -- result* )
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OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
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STH2kr STA2
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STH2kr INC2 INC2 LDA2 STH2kr LDA2 SUB2 !&return
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#0000
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&return
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POP2r JMP2r
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@int_mul_ ( b* a* -- result* )
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OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
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STH2kr STA2
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STH2kr INC2 INC2 LDA2 STH2kr LDA2 MUL2 !&return
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#0000
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&return
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POP2r JMP2r
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@int_div_ ( b* a* -- result* )
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OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
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STH2kr STA2
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STH2kr INC2 INC2 LDA2 STH2kr LDA2 sdiv
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!&return
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#0000
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&return
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POP2r JMP2r
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@int_eq_ ( b* a* -- result* )
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OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
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STH2kr STA2
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STH2kr INC2 INC2 LDA2 STH2kr LDA2 EQU2 #00 SWP !&return
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#0000
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&return
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POP2r JMP2r
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@int_ne_ ( b* a* -- result* )
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OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
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STH2kr STA2
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STH2kr INC2 INC2 LDA2 STH2kr LDA2 NEQ2 #00 SWP !&return
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#0000
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&return
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POP2r JMP2r
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@int_lt_ ( b* a* -- result* )
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OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
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STH2kr STA2
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STH2kr INC2 INC2 LDA2 #8000 EOR2 STH2kr LDA2 #8000 EOR2 LTH2 #00 SWP !&return
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#0000
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&return
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POP2r JMP2r
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@int_le_ ( b* a* -- result* )
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OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
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STH2kr STA2
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STH2kr INC2 INC2 LDA2 #8000 EOR2 STH2kr LDA2 #8000 EOR2 GTH2 #00 SWP #01 EOR !&return
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#0000
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&return
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POP2r JMP2r
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@int_gt_ ( b* a* -- result* )
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OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
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STH2kr STA2
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STH2kr LDA2 #8000 EOR2 STH2kr INC2 INC2 LDA2 #8000 EOR2 LTH2 #00 SWP !&return
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#0000
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&return
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POP2r JMP2r
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@int_ge_ ( b* a* -- result* )
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OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
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STH2kr STA2
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STH2kr LDA2 #8000 EOR2 STH2kr INC2 INC2 LDA2 #8000 EOR2 GTH2 #00 SWP #01 EOR !&return
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#0000
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&return
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POP2r JMP2r
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@int_neg_ ( f* -- result* )
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OVR2r LIT2r 0002 SUB2r STH2kr STA2
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#0000 STH2kr LDA2 SUB2 !&return
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#0000
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&return
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POP2r JMP2r
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@int_abs_ ( f* -- result* )
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OVR2r LIT2r 0002 SUB2r STH2kr STA2
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STH2kr LDA2 #8000 EOR2 #8000 LTH2 ?&then.1
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STH2kr LDA2 !&end.1
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&then.1
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#0000 STH2kr LDA2 SUB2
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&end.1
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!&return
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#0000
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&return
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POP2r JMP2r
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@str/<print> ( str* -- )
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LDAk DUP ?{ POP POP2 JMP2r }
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#18 DEO
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INC2 !/<print>
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@mem_length_ #0000
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@mem_ @memory $10000 |