|100
	LIT2r 0000

!{ @code $2 } ;{ #0002 ADD2 } !{ 2b 2b 2b 2b 2b 2b 2b 2b 5b 3e 2b 2b 2b 2b 5b 3e 2b 2b 3e 2b 2b 2b 3e 2b 2b 2b 3e 2b 3c 3c 3c 3c 2d 5d 3e 2b 3e 2b 3e 2d 3e 3e 2b 5b 3c 5d 3c 2d 5d 3e 3e 2e 3e 2d 2d 2d 2e 2b 2b 2b 2b 2b 2b 2b 2e 2e 2b 2b 2b 2e 3e 3e 2e 3c 2d 2e 3c 2e 2b 2b 2b 2e 2d 2d 2d 2d 2d 2d 2e 2d 2d 2d 2d 2d 2d 2d 2d 2e 3e 3e 2b 2e 3e 2b 2b 2e 00 } ;code STA2 
;code LDA2 bf_ POP2r BRK @bf_ ( code  -- )
	OVR2r LIT2r 000a SUB2r
	STH2kr STA2

	STH2kr #2712 ADD2 LDA2

	STH2kr #2714 ADD2 LDA2
#0000 	STH2kr #2714 ADD2 STA2

&while.0 	STH2kr #2714 ADD2 LDA2 #006a LTH2 #03 JCN !{ 
	STH2kr #0004 ADD2 LDA2 #0000 LTH2 #03 JCN !{ 
!&if_end.0 } &if_end.0 
	STH2kr #0004 ADD2 LDA2 #006a GTH2 !&return 	STH2kr #0002 ADD2 LDA2 ;memory LDA2 GTH2 #03 JCN !{ 
!&return !&if_end.1 } &if_end.1 
	STH2kr LDA2 #03 JCN !{ 
!&if_end.2 } &if_end.2 
	STH2kr #0004 ADD2 LDA2 #0027 	STH2kr #0002 ADD2 LDA2 #0001 ADD2 	STH2kr #0002 ADD2 STA2 	STH2kr LDA2 #03 JCN !{ 
!&if_end.3 } &if_end.3 
	STH2kr #0004 ADD2 LDA2 #0027 	STH2kr #0002 ADD2 LDA2 #0001 SUB2 	STH2kr #0002 ADD2 STA2 	STH2kr LDA2 #03 JCN !{ 
!&if_end.4 } &if_end.4 
	STH2kr #0004 ADD2 LDA2 #0027 ;memory 	STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 ;memory 	STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #0001 ADD2 	STH2kr LDA2 #03 JCN !{ 
!&if_end.5 } &if_end.5 
	STH2kr #0004 ADD2 LDA2 #0027 ;memory 	STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 ;memory 	STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #0001 SUB2 	STH2kr LDA2 #03 JCN !{ 
!&if_end.6 } &if_end.6 
	STH2kr #0004 ADD2 LDA2 #0027 ;memory 	STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #18 DEO 	STH2kr LDA2 #03 JCN !{ 
!&if_end.7 } &if_end.7 
	STH2kr #0004 ADD2 LDA2 #0027 ;memory 	STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #12 DEI 	STH2kr LDA2 #03 JCN !{ 
!&if_end.8 } &if_end.8 
	STH2kr #0004 ADD2 LDA2 #0027 ;memory 	STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #0000 EQU2 #03 JCN !{ 
	STH2kr LDA2
#0001 	STH2kr STA2

&while.1 	STH2kr LDA2 #0000 GTH2 #03 JCN !{ 
	STH2kr #0004 ADD2 LDA2 #0001 ADD2 	STH2kr #0004 ADD2 STA2 	STH2kr LDA2 #03 JCN !{ 
!&if_end.9 } &if_end.9 
	STH2kr #0004 ADD2 LDA2 #0027 	STH2kr LDA2 #0001 ADD2 	STH2kr STA2 	STH2kr LDA2 #03 JCN !{ 
!&if_end.10 } &if_end.10 
	STH2kr #0004 ADD2 LDA2 #0027 	STH2kr LDA2 #0001 SUB2 	STH2kr STA2 !&while.1 } 
!&if_end.11 } &if_end.11 
	STH2kr LDA2 #03 JCN !{ 
!&if_end.12 } &if_end.12 
	STH2kr #0004 ADD2 LDA2 #0027 ;memory 	STH2kr #0002 ADD2 LDA2 #0001 MUL2 ADD2 #0002 ADD2 LDA2 #03 JCN !{ 
	STH2kr LDA2
#0001 	STH2kr STA2

&while.2 	STH2kr LDA2 #0000 GTH2 #03 JCN !{ 
	STH2kr #0004 ADD2 LDA2 #0001 SUB2 	STH2kr #0004 ADD2 STA2 	STH2kr LDA2 #03 JCN !{ 
!&if_end.13 } &if_end.13 
	STH2kr #0004 ADD2 LDA2 #0027 	STH2kr LDA2 #0001 ADD2 	STH2kr STA2 	STH2kr LDA2 #03 JCN !{ 
!&if_end.14 } &if_end.14 
	STH2kr #0004 ADD2 LDA2 #0027 	STH2kr LDA2 #0001 SUB2 	STH2kr STA2 !&while.2 } 
!&if_end.15 } &if_end.15 
	STH2kr #0004 ADD2 LDA2 #0001 ADD2 	STH2kr #0004 ADD2 STA2 !&while.0 } 
	&return
		POP2r JMP2r

@sext
  #80 ANDk EQU #ff MUL SWP JMP2r
@sdiv
    OVR #80 AND ?&b_neg  &b_pos    OVR2 POP #80 AND ?&a_neg_b_pos    DIV2 JMP2r  &a_neg_b_pos    SWP2 #0000 SWP2 SUB2 SWP2 DIV2 #0000 SWP2 SUB2 JMP2r
  &b_neg    #0000 SWP2 SUB2 OVR2 POP #80 AND ?&a_neg_b_neg    DIV2 #0000 SWP2 SUB2 JMP2r
  &a_neg_b_neg    #0000 ROT2 SUB2 SWP2 DIV2 JMP2r

@aalloc_ ( size* -- result* )
    OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
    ;mem_length_ LDA2 STH2kr STA2
    ;mem_length_ LDA2k STH2kr INC2 INC2 LDA2 ADD2 SWP2 STA2
    ;mem_ STH2kr LDA2 ADD2 !&return
    #0000

  &return
    POP2r JMP2r

@areturn_ ( size* src* checkpoint* -- result* )
    OVR2r LIT2r 000a SUB2r STH2kr #0008 ADD2 STA2
    STH2kr #0006 ADD2 STA2
    STH2kr #0004 ADD2 STA2
    ;mem_ STH2kr #0008 ADD2 LDA2 ADD2 STH2kr INC2 INC2 STA2
    STH2kr #0006 ADD2 LDA2 STH2kr INC2 INC2 LDA2 NEQ2 ?&end.1
    STH2kr #0006 ADD2 LDA2 !&return

  &end.1
    #0000 STH2kr STA2

  &begin.2
    STH2kr LDA2 STH2kr #0004 ADD2 LDA2 LTH2 #00 EQU ?&break.2
    STH2kr #0006 ADD2 LDA2 STH2kr LDA2 ADD2 LDA sext
    STH2kr INC2 INC2 LDA2 STH2kr LDA2 ADD2 STA
    POP

  &continue.2
    STH2kr LDA2k INC2k ROT2 STA2
    POP2 !&begin.2

  &break.2
    STH2kr #0008 ADD2 LDA2 STH2kr #0004 ADD2 LDA2 ADD2 ;mem_length_ STA2
    #0000 ;mem_ ;mem_length_ LDA2 ADD2 STA
    POP STH2kr INC2 INC2 LDA2 !&return
    #0000

  &return
    POP2r JMP2r

@afree_ ( -- result* )
    OVR2r #0000 ;mem_length_ STA2
    #0000

  &return
    POP2r JMP2r

@amcpy_ ( length* from* -- result* )
    OVR2r LIT2r 0008 SUB2r STH2kr #0006 ADD2 STA2
    STH2kr #0004 ADD2 STA2
    STH2kr #0004 ADD2 LDA2 aalloc_
    STH2kr INC2 INC2 STA2
    #0000 STH2kr STA2

  &begin.1
    STH2kr LDA2 STH2kr #0004 ADD2 LDA2 LTH2 #00 EQU ?&break.1
    STH2kr #0006 ADD2 LDA2 STH2kr LDA2 ADD2 LDA sext
    STH2kr INC2 INC2 LDA2 STH2kr LDA2 ADD2 STA
    POP

  &continue.1
    STH2kr LDA2k INC2k ROT2 STA2
    POP2 !&begin.1

  &break.1
    STH2kr INC2 INC2 LDA2 !&return
    #0000

  &return
    POP2r JMP2r

@nat_to_str_ ( n* -- result* )
    OVR2r LIT2r 000a SUB2r STH2kr #0008 ADD2 STA2
    #0005 STH2kr STA2

  &begin.1
    STH2kr #0008 ADD2 LDA2 #000a OVR2 OVR2 DIV2 MUL2 SUB2 #0030 ADD2 STH2kr INC2 INC2 STH2kr LDA2k #0001 SUB2 SWP2 STA2k
    POP2 ADD2 STA
    POP STH2kr #0008 ADD2 LDA2k #000a DIV2 SWP2 STA2

  &continue.1
    #0000 STH2kr #0008 ADD2 LDA2 LTH2 ?&begin.1

  &break.1
    #0005 STH2kr LDA2 SUB2 STH2kr INC2 INC2 STH2kr LDA2 ADD2 amcpy_
    !&return
    #0000

  &return
    POP2r JMP2r

@int_to_str_ ( n* -- result* )
    OVR2r LIT2r 000c SUB2r STH2kr #000a ADD2 STA2
    #0006 STH2kr INC2 INC2 STA2
    STH2kr #000a ADD2 LDA2 #8000 EOR2 #8000 LTH2 #00 SWP #0000 NEQ2 #00 SWP STH2kr STA
    POP LDAkr STHr sext
    #0000 EQU2 ?&end.1
    #0000 STH2kr #000a ADD2 LDA2 SUB2 STH2kr #000a ADD2 STA2

  &end.1

  &begin.2
    STH2kr #000a ADD2 LDA2 #000a OVR2 OVR2 sdiv/b_pos
    MUL2 SUB2 #0030 ADD2 STH2kr #0004 ADD2 STH2kr INC2 INC2 LDA2k #0001 SUB2 SWP2 STA2k
    POP2 ADD2 STA
    POP STH2kr #000a ADD2 LDA2k #000a sdiv/b_pos
    SWP2 STA2

  &continue.2
    #8000 STH2kr #000a ADD2 LDA2 #8000 EOR2 LTH2 ?&begin.2

  &break.2
    LDAkr STHr sext
    #0000 EQU2 ?&end.3
    #002d STH2kr #0004 ADD2 STH2kr INC2 INC2 LDA2k #0001 SUB2 SWP2 STA2k
    POP2 ADD2 STA
    POP

  &end.3
    #0006 STH2kr INC2 INC2 LDA2 SUB2 STH2kr #0004 ADD2 STH2kr INC2 INC2 LDA2 ADD2 amcpy_
    !&return
    #0000

  &return
    POP2r JMP2r

@int_to_nat_ ( n* -- result* )
    OVR2r LIT2r 0002 SUB2r STH2kr STA2
    STH2kr LDA2 !&return
    #0000

  &return
    POP2r JMP2r

@nat_to_int_ ( n* -- result* )
    OVR2r LIT2r 0002 SUB2r STH2kr STA2
    STH2kr LDA2 !&return
    #0000

  &return
    POP2r JMP2r

@int_add_ ( b* a* -- result* )
    OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
    STH2kr STA2
    STH2kr INC2 INC2 LDA2 STH2kr LDA2 ADD2 !&return
    #0000

  &return
    POP2r JMP2r

@int_sub_ ( b* a* -- result* )
    OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
    STH2kr STA2
    STH2kr INC2 INC2 LDA2 STH2kr LDA2 SUB2 !&return
    #0000

  &return
    POP2r JMP2r

@int_mul_ ( b* a* -- result* )
    OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
    STH2kr STA2
    STH2kr INC2 INC2 LDA2 STH2kr LDA2 MUL2 !&return
    #0000

  &return
    POP2r JMP2r

@int_div_ ( b* a* -- result* )
    OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
    STH2kr STA2
    STH2kr INC2 INC2 LDA2 STH2kr LDA2 sdiv
    !&return
    #0000

  &return
    POP2r JMP2r

@int_eq_ ( b* a* -- result* )
    OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
    STH2kr STA2
    STH2kr INC2 INC2 LDA2 STH2kr LDA2 EQU2 #00 SWP !&return
    #0000

  &return
    POP2r JMP2r

@int_ne_ ( b* a* -- result* )
    OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
    STH2kr STA2
    STH2kr INC2 INC2 LDA2 STH2kr LDA2 NEQ2 #00 SWP !&return
    #0000

  &return
    POP2r JMP2r

@int_lt_ ( b* a* -- result* )
    OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
    STH2kr STA2
    STH2kr INC2 INC2 LDA2 #8000 EOR2 STH2kr LDA2 #8000 EOR2 LTH2 #00 SWP !&return
    #0000

  &return
    POP2r JMP2r

@int_le_ ( b* a* -- result* )
    OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
    STH2kr STA2
    STH2kr INC2 INC2 LDA2 #8000 EOR2 STH2kr LDA2 #8000 EOR2 GTH2 #00 SWP #01 EOR !&return
    #0000

  &return
    POP2r JMP2r

@int_gt_ ( b* a* -- result* )
    OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
    STH2kr STA2
    STH2kr LDA2 #8000 EOR2 STH2kr INC2 INC2 LDA2 #8000 EOR2 LTH2 #00 SWP !&return
    #0000

  &return
    POP2r JMP2r

@int_ge_ ( b* a* -- result* )
    OVR2r LIT2r 0004 SUB2r STH2kr INC2 INC2 STA2
    STH2kr STA2
    STH2kr LDA2 #8000 EOR2 STH2kr INC2 INC2 LDA2 #8000 EOR2 GTH2 #00 SWP #01 EOR !&return
    #0000

  &return
    POP2r JMP2r

@int_neg_ ( f* -- result* )
    OVR2r LIT2r 0002 SUB2r STH2kr STA2
    #0000 STH2kr LDA2 SUB2 !&return
    #0000

  &return
    POP2r JMP2r

@int_abs_ ( f* -- result* )
    OVR2r LIT2r 0002 SUB2r STH2kr STA2
    STH2kr LDA2 #8000 EOR2 #8000 LTH2 ?&then.1
    STH2kr LDA2 !&end.1

  &then.1
    #0000 STH2kr LDA2 SUB2

  &end.1
    !&return
    #0000

  &return
    POP2r JMP2r
    
@str/<print> ( str* -- )
    LDAk DUP ?{ POP POP2 JMP2r }
    #18 DEO
    INC2 !/<print>

@mem_length_ #0000
@mem_    @memory $10000