266 lines
5.9 KiB
C
266 lines
5.9 KiB
C
#ifndef OV2640_INIT_H
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#define OV2640_INIT_H
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#include "arducam.h"
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#include <stdint.h>
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struct senosr_reg ov2640_vga[] = {
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{0xff, 0x00}, /* Device control register list Table 12 */
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{0x2c, 0xff}, /* Reserved */
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{0x2e, 0xdf}, /* Reserved */
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{0xff, 0x01}, /* Device control register list Table 13 */
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{0x3c, 0x32}, /* Reserved */
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{0x11, 0x00}, /* Clock Rate Control */
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{0x09, 0x02}, /* Common control 2 */
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{0x04, 0xA8}, /* Mirror */
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{0x13, 0xe5}, /* Common control 8 */
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{0x14, 0x48}, /* Common control 9 */
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{0x2c, 0x0c}, /* Reserved */
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{0x33, 0x78}, /* Reserved */
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{0x3a, 0x33}, /* Reserved */
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{0x3b, 0xfB}, /* Reserved */
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{0x3e, 0x00}, /* Reserved */
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{0x43, 0x11}, /* Reserved */
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{0x16, 0x10}, /* Reserved */
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{0x4a, 0x81}, /* Reserved */
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{0x21, 0x99}, /* Reserved */
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{0x24, 0x40}, /* Luminance signal High range */
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{0x25, 0x38}, /* Luminance signal low range */
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{0x26, 0x82}, /* */
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{0x5c, 0x00}, /* Reserved */
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{0x63, 0x00}, /* Reserved */
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{0x46, 0x3f}, /* Frame length adjustment */
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{0x0c, 0x3c}, /* Common control 3 */
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{0x61, 0x70}, /* Histogram algo low level */
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{0x62, 0x80}, /* Histogram algo high level */
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{0x7c, 0x05}, /* Reserved */
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{0x20, 0x80}, /* Reserved */
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{0x28, 0x30}, /* Reserved */
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{0x6c, 0x00}, /* Reserved */
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{0x6d, 0x80}, /* Reserved */
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{0x6e, 0x00}, /* Reserved */
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{0x70, 0x02}, /* Reserved */
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{0x71, 0x94}, /* Reserved */
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{0x73, 0xc1}, /* Reserved */
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{0x3d, 0x34}, /* Reserved */
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{0x5a, 0x57}, /* Reserved */
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{0x12, 0x00}, /* Common control 7 */
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{0x11, 0x00}, /* Clock Rate Control 2*/
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{0x17, 0x11}, /* Horiz window start MSB 8bits */
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{0x18, 0x75}, /* Horiz window end MSB 8bits */
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{0x19, 0x01}, /* Vert window line start MSB 8bits */
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{0x1a, 0x97}, /* Vert window line end MSB 8bits */
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{0x32, 0x36},
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{0x03, 0x0f},
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{0x37, 0x40},
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{0x4f, 0xbb},
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{0x50, 0x9c},
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{0x5a, 0x57},
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{0x6d, 0x80},
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{0x6d, 0x38},
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{0x39, 0x02},
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{0x35, 0x88},
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{0x22, 0x0a},
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{0x37, 0x40},
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{0x23, 0x00},
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{0x34, 0xa0},
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{0x36, 0x1a},
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{0x06, 0x02},
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{0x07, 0xc0},
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{0x0d, 0xb7},
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{0x0e, 0x01},
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{0x4c, 0x00},
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{0xff, 0x00},
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{0xe5, 0x7f},
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{0xf9, 0xc0},
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{0x41, 0x24},
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{0xe0, 0x14},
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{0x76, 0xff},
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{0x33, 0xa0},
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{0x42, 0x20},
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{0x43, 0x18},
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{0x4c, 0x00},
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{0x87, 0xd0},
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{0x88, 0x3f},
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{0xd7, 0x03},
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{0xd9, 0x10},
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{0xd3, 0x82},
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{0xc8, 0x08},
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{0xc9, 0x80},
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{0x7d, 0x00},
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{0x7c, 0x03},
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{0x7d, 0x48},
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{0x7c, 0x08},
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{0x7d, 0x20},
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{0x7d, 0x10},
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{0x7d, 0x0e},
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{0x90, 0x00},
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{0x91, 0x0e},
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{0x91, 0x1a},
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{0x91, 0x31},
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{0x91, 0x5a},
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{0x91, 0x69},
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{0x91, 0x75},
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{0x91, 0x7e},
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{0x91, 0x88},
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{0x91, 0x8f},
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{0x91, 0x96},
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{0x91, 0xa3},
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{0x91, 0xaf},
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{0x91, 0xc4},
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{0x91, 0xd7},
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{0x91, 0xe8},
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{0x91, 0x20},
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{0x92, 0x00},
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{0x93, 0x06},
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{0x93, 0xe3},
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{0x93, 0x02},
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{0x93, 0x02},
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{0x93, 0x00},
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{0x93, 0x04},
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{0x93, 0x00},
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{0x93, 0x03},
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{0x93, 0x00},
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{0x93, 0x00},
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{0x93, 0x00},
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{0x93, 0x00},
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{0x93, 0x00},
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{0x93, 0x00},
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{0x93, 0x00},
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{0x96, 0x00},
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{0x97, 0x08},
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{0x97, 0x19},
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{0x97, 0x02},
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{0x97, 0x0c},
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{0x97, 0x24},
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{0x97, 0x30},
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{0x97, 0x28},
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{0x97, 0x26},
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{0x97, 0x02},
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{0x97, 0x98},
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{0x97, 0x80},
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{0x97, 0x00},
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{0x97, 0x00},
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{0xc3, 0xef},
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{0xff, 0x00},
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{0xba, 0xdc},
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{0xbb, 0x08},
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{0xb6, 0x24},
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{0xb8, 0x33},
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{0xb7, 0x20},
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{0xb9, 0x30},
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{0xb3, 0xb4},
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{0xb4, 0xca},
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{0xb5, 0x43},
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{0xb0, 0x5c},
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{0xb1, 0x4f},
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{0xb2, 0x06},
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{0xc7, 0x00},
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{0xc6, 0x51},
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{0xc5, 0x11},
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{0xc4, 0x9c},
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{0xbf, 0x00},
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{0xbc, 0x64},
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{0xa6, 0x00},
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{0xa7, 0x1e},
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{0xa7, 0x6b},
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{0xa7, 0x47},
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{0xa7, 0x33},
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{0xa7, 0x00},
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{0xa7, 0x23},
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{0xa7, 0x2e},
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{0xa7, 0x85},
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{0xa7, 0x42},
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{0xa7, 0x33},
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{0xa7, 0x00},
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{0xa7, 0x23},
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{0xa7, 0x1b},
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{0xa7, 0x74},
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{0xa7, 0x42},
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{0xa7, 0x33},
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{0xa7, 0x00},
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{0xa7, 0x23},
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{0xc0, 0xc8},
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{0xc1, 0x96},
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{0x8c, 0x00},
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{0x86, 0x3d},
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{0x50, 0x92},
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{0x51, 0x90},
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{0x52, 0x2c},
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{0x53, 0x00},
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{0x54, 0x00},
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{0x55, 0x88},
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{0x5a, 0x50},
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{0x5b, 0x3c},
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{0x5c, 0x00},
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{0xd3, 0x04},
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{0x7f, 0x00},
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{0xda, 0x00},
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{0xe5, 0x1f},
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{0xe1, 0x67},
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{0xe0, 0x00},
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{0xdd, 0x7f},
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{0x05, 0x00},
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{0xff, 0x00},
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{0xe0, 0x04},
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{0xc0, 0xc8},
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{0xc1, 0x96},
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{0x86, 0x3d},
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{0x50, 0x92},
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{0x51, 0x90},
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{0x52, 0x2c},
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{0x53, 0x00},
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{0x54, 0x00},
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{0x55, 0x88},
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{0x57, 0x00},
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{0x5a, 0x50},
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{0x5b, 0x3c},
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{0x5c, 0x00},
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{0xd3, 0x04},
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{0xe0, 0x00},
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{0xFF, 0x00},
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{0x05, 0x00},
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{0xDA, 0x08},
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{0xda, 0x09},
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{0x98, 0x00},
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{0x99, 0x00},
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{0x00, 0x00},
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{0xff, 0x00},
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{0xe0, 0x04},
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{0xc0, 0xc8},
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{0xc1, 0x96},
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{0x86, 0x3d},
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{0x50, 0x89},
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{0x51, 0x90},
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{0x52, 0x2c},
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{0x53, 0x00},
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{0x54, 0x00},
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{0x55, 0x88},
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{0x57, 0x00},
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{0x5a, 0xA0},
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{0x5b, 0x78},
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{0x5c, 0x00},
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{0xd3, 0x02},
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{0xFFFF, 0xFF}
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};
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struct senosr_reg ov2640_uxga_cif[] = {
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{0xff, 0x00},
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{0xe0, 0x04},
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{0xc0, 0xc8},
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{0xc1, 0x96},
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{0x86, 0x35},
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{0x50, 0x92},
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{0x51, 0x90},
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{0x52, 0x2c},
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{0x53, 0x00},
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{0x54, 0x00},
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{0x55, 0x88},
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{0x57, 0x00},
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{0x5a, 0x58},
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{0x5b, 0x48},
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{0x5c, 0x00},
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{0xd3, 0x08},
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{0xFFFF, 0xFF}
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};
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#endif
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